Brief summary for those aren't sure what all the stuff in CPU info means:
All cameras reported so far use an ARM946ES rev 1 CPU, with 8k of instruction and data cache (4 way associative, 8 words/line), 4k instruction and data of "tightly coupled memory"
This is an ARM architecture 5TE chip.
Note: ARM model
numbers, like ARM946ES should not be confused with ARM architecture
versions, like ARMv5TE.
The TE suffix means that ARM DSP Instruction Set Extensions
The implementor (=ARM) and variant (=0) fields suggest this is a plain jane implementation, at least as far as arm code is concerned.
A memory protection (MPU) unit is present, a memory management unit (MMU) is not.
Clock speed is unknown, but strings in my ROM suggest variable between 18mhz and 72mhz (but there are three different ones, H, L and M, and they might refer to base values to which multipliers are applied. The arm docs mention HCLK and CLK) The addresses which get/set these seem pretty obvious, so I may have more on that later.
Intentionally self-replying in case someone wants to move the svn stuff to a different thread