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chdk in the DIGIC6 world

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Offline srsa_4c

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Re: chdk in the DIGIC6 world
« Reply #180 on: 08 / January / 2020, 15:15:22 »
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Which seems a bit odd, even the lower 16K doesn't seem to be close to fully used, and the BTCM only obviously uses the lower 2k for exception stack.
I'd guess the chip was designed with higher workload in mind and our PowerShots only use a fraction of its capabilities. Similar to DIGIC 5, where the second ARM core is only used on a few (touchscreen) compacts and only for managing the touchscreen.
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The code referencing the *TCM_START_ADDR and END_ADDR matches the values from CPU info.
Hmm, indeed.

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Offline srsa_4c

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Re: chdk in the DIGIC6 world
« Reply #181 on: 12 / January / 2020, 08:54:11 »
The CPU of the sx280 runs 1 million cycles of this
Code: [Select]
002bd560 <busyloop1>:
  2bd560: 3801      subs r0, #1
  2bd562: f63f affd bhi.w 2bd560 <busyloop1>
in 20 msecs (measured right before booting CHDK and in playback mode).
Omar also seems to do 100 "BogoMips". One primary core of the D7 does 400.
As for timers, 0xc0242014 is available on both ARM cores of D6. The 32-bit microsecond timer (0xd400000c) is not reachable on Omar (reading it kills the task).
Both timers are available on the D7 primary cores.

 

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