ELPH 340 (IXUS 265) - page 13 - DryOS Development - CHDK Forum

ELPH 340 (IXUS 265)

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Offline srsa_4c

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Re: ELPH 340 (IXUS 265)
« Reply #120 on: 13 / April / 2020, 10:34:35 »
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<on> = play  :-X  <play> = play.
(Same as Ix275 now)
:(
Have you tried holding down those buttons for longer?
If long pressing play shuts down the camera, please set the ALT key to Wifi in the CHDK menu and try again.

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Offline Caefix

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Re: ELPH 340 (IXUS 265)
« Reply #121 on: 13 / April / 2020, 10:46:04 »
<on> = play  :-X  <play> = play.
(Same as Ix275 now)
:(
set the ALT key to Wifi in the CHDK menu.
8) Always the 1st I do.
<play> in play always shuts down, in rec closes lens.
Quality of keystroke doesn´t matter.
All lifetime is a loan from eternity.

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Offline srsa_4c

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Re: ELPH 340 (IXUS 265)
« Reply #122 on: 13 / April / 2020, 17:31:35 »
@Caefix
Can you do this:
- enter 0xC022F48C in memory browser
- exit memory browser with MENU
- enable Miscellaneous stuff -> Debug parameters -> Show Misc values
- exit ALT mode
- shut down the camera
- press and hold ON/OFF button
- note the number(s) you see in the MEM: line
- unpress ON/OFF
- note the number(s) you see in the MEM: line, again

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Offline whim

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Re: ELPH 340 (IXUS 265)
« Reply #123 on: 14 / April / 2020, 05:21:44 »
Hi @srsa_4c,

I'm seeing MEM:0xcb640pq, where p is cycling thru 0..3,
and q is cycling thru 3 7 b f.
After unpressing(releasing) on/off result is
MEM:0xcbe40pq, same cycling for p & q
Note that lens did not extend while performing this procedure,
and starting the cam with short press "play" also produces
MEM:0xcbe40pq, same cycling for p & q

hope that helps,
wim
« Last Edit: 14 / April / 2020, 05:31:39 by whim »


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Offline Caefix

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Re: ELPH 340 (IXUS 265)
« Reply #124 on: 14 / April / 2020, 10:51:19 »
 :) Yes, & starting long<play> = 0xcAe, <wifi> = 0xc9e... holding <wifi> turns on & off immediately.
// Same at srsa´s build, where <on> always opens lens.
« Last Edit: 14 / April / 2020, 10:55:45 by Caefix »
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Offline srsa_4c

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Re: ELPH 340 (IXUS 265)
« Reply #125 on: 14 / April / 2020, 12:32:28 »
I'm seeing MEM:0xcb640pq, where p is cycling thru 0..3,
and q is cycling thru 3 7 b f.
After unpressing(releasing) on/off result is
MEM:0xcbe40pq, same cycling for p & q
Note that lens did not extend while performing this procedure,
and starting the cam with short press "play" also produces
MEM:0xcbe40pq, same cycling for p & q
Thank you, also to Caefix.

It looks like the ON/OFF button is GPIO 0x47, playback is 0x48 and wifi is 0x49, as seen in sub_ff02bc5c. Buttons are active low, as usual, but sub_ff02bc5c appears to invert them. If I interpret it correctly, 0x2ad8 would be getting 0x100000 when on/off is pressed, but that contradicts what's in my RAM dump.

So, I guess, the line in boot.c would be
*(int*)(0x2ad8) = (*(int*)0xC022F48C)&0x80000 ? 0x200000 : 0x100000;

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Offline Caefix

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Re: ELPH 340 (IXUS 265)
« Reply #126 on: 14 / April / 2020, 13:05:25 »
*(int*)(0x2ad8) = (*(int*)0xC022F48C)&0x80000 ? 0x200000 : 0x100000;
:D Compiled in former source & working!

// core/gui_osd line 1136 has %#8x . Maybe it should be
           sprintf(osd_buf, "MEM: %08x", (void*) (*(int*)conf.mem_view_addr_init));
           // show value in                08 digit Hexadecimal integer
« Last Edit: 14 / April / 2020, 13:17:57 by Caefix »
All lifetime is a loan from eternity.

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Offline blackhole

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Re: ELPH 340 (IXUS 265)
« Reply #127 on: 14 / April / 2020, 13:19:25 »
I'm seeing MEM:0xcb640pq, where p is cycling thru 0..3,
and q is cycling thru 3 7 b f.
After unpressing(releasing) on/off result is
MEM:0xcbe40pq, same cycling for p & q
Note that lens did not extend while performing this procedure,
and starting the cam with short press "play" also produces
MEM:0xcbe40pq, same cycling for p & q
Thank you, also to Caefix.

It looks like the ON/OFF button is GPIO 0x47, playback is 0x48 and wifi is 0x49, as seen in sub_ff02bc5c. Buttons are active low, as usual, but sub_ff02bc5c appears to invert them. If I interpret it correctly, 0x2ad8 would be getting 0x100000 when on/off is pressed, but that contradicts what's in my RAM dump.

So, I guess, the line in boot.c would be
*(int*)(0x2ad8) = (*(int*)0xC022F48C)&0x80000 ? 0x200000 : 0x100000;
With that we are started, except for 0xc022f48c, in the original source code it was 0xc022f484.
A modified boot.c is attached.


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Offline blackhole

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Re: ELPH 340 (IXUS 265)
« Reply #128 on: 05 / May / 2020, 07:56:03 »
Is everything okay with this port now (Tv,ISO overrides,PTP..)?

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Offline Caefix

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Re: ELPH 340 (IXUS 265)
« Reply #129 on: 05 / May / 2020, 09:57:22 »
 ??? PTP waiting for connection.
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