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Benchmark

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Offline srsa_4c

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Benchmark
« on: 17 / January / 2015, 17:18:53 »
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Improved version of the default benchmark module (for current trunk).
I have rewritten all memory benchmark code to make it compiler independent as much as possible. The most critical parts are now in asm.
I have also added measurement of CPU speed (kind of BogoMips) and CHDK character drawing speed. The latter can be useful when trying to optimize drawing routines.
I've made it possible to skip the SD card benchmarks (shutter half press starts this mode, not indicated on screen).

To my surprise, it turned out that some DIGIC 4 cameras are clocked higher than others. I'm getting ~72 MIPS on my low end a3200 and a3400, but ~84 on my ixus115. The old ixus65 is ~36 MIPS. Decimals are truncated, so 72 MIPS cameras will display at most 71 MIPS.

Bugreports on the code are welcome. I'm planning to add the improvements to trunk (before the inclusion of DIGIC 6 support). This code is not final.

Source and arm-elf module for current trunk (r3924) attached. The latter will probably become incompatible shortly.
« Last Edit: 19 / January / 2015, 17:43:46 by srsa_4c »
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Offline philmoz

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Re: Benchmark
« Reply #1 on: 17 / January / 2015, 19:26:49 »
Quote from: srsa_4c on 17 / January / 2015, 17:18:53
Improved version of the default benchmark module (for current trunk).
I have rewritten all memory benchmark code to make it compiler independent as much as possible. The most critical parts are now in asm.
I have also added measurement of CPU speed (kind of BogoMips) and CHDK character drawing speed. The latter can be useful when trying to optimize drawing routines.
I've made it possible to skip the SD card benchmarks (shutter half press starts this mode, not indicated on screen).

To my surprise, it turned out that some DIGIC 4 cameras are clocked higher than others. I'm getting ~72 MIPS on my low end a3200 and a3400, but ~84 on my ixus115. The old ixus65 is ~36 MIPS. Decimals are truncated, so 72 MIPS cameras will display at most 71 MIPS.

Bugreports on the code are welcome. I'm planning to add the improvements to trunk (before the inclusion of DIGIC 6 support). This code is not final.

Source and arm-elf module for current trunk (r3924) attached. The latter will probably become incompatible shortly.

Looks ok. How confident are you that 0xc0242014 will be the correct machine time value for all cameras?

If you're fixing this then it really needs to properly separate the kbd and gui code - currently the benchmark runs when the button is pressed in the kdb task; but this code also draws to the screen. At the same time the gui task will be calling gui_draw_bench as well. It should probably not be redrawing the screen while a test is running.

Phil.
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Offline srsa_4c

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Re: Benchmark
« Reply #2 on: 17 / January / 2015, 19:46:59 »
Running the tests in SpyTask causes 3..5 % drop in memory related measured performance, probably due to the task's lower priority.

(Wow, I meant to make a new post but erased my older one instead...)
« Last Edit: 18 / January / 2015, 18:50:08 by srsa_4c »
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Offline srsa_4c

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Re: Benchmark
« Reply #3 on: 19 / January / 2015, 17:41:46 »
Quote from: philmoz on 17 / January / 2015, 19:26:49
How confident are you that 0xc0242014 will be the correct machine time value for all cameras?
I have added detection of the related firmware routines (I'll commit it in a few days), visual inspection shows that all supported cameras use that address.

I have added logging ability to the module (switch on/off by left&right), but the user isn't informed about this option either (there's not much remaining screen space and the module is mostly localized). Attachment in first post updated.

edit:
usec counter related commits: 3935, 3936 (trunk); 3937, 3938 (1.3).
« Last Edit: 20 / January / 2015, 12:42:39 by srsa_4c »
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Offline srsa_4c

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Re: Benchmark
« Reply #4 on: 03 / December / 2016, 18:56:14 »
A small note here. I used to be assuming that the (bogo)MIPS determined by the CPU speed benchmark is actually the CPU clock in MHz. Looks like I was completely wrong. If I read the docs correctly, a branch instruction takes 3 cycles to execute on ARMv5 and one cycle on Cortex R4. The loop that "measures" CPU speed consists of 2 instructions, one of them is a branch instruction.
If I add lots of NOPs to the measure loop (should take 1 cycle on both architectures), results appear to indicate that DIGIC II (and III) run above 60 MHz. Most DIGIC 4 cams run twice as fast, others (and DIGIC 4+) even faster. My D6 cam seems to run its primary core at 200 MHz, if I can believe the bench results.
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