AFAIk, triggering from a ptp command does not give you that exact same starting point. So trying to add a precision adjustment to avoid interrupts won't do much for you if the two cameras are already tens of milliseconds apart when they start interpretting the ptp continue message.
But by all means, implement and test it. I'd be interested to hear what you learn.
Yes, I plan to do a large camera count trial sometime in the new year and will provide feedback. I first need to make sure I more fully understand the various +/- 10ms uncertainty points and maybe a little more at the low-level USB frame level. Collapsing variability by using the combination of ptp based trigger and precision sync is potentially of interest in one use case so I want to investigate that more fully before continuing down the more complicated usb trigger wiring / ucontroller route.
So the A1200 is the only camera where it is implemented.
Not sure what you mean - vnd's precision sync code is in
https://app.assembla.com/spaces/chdk/subversion/source/HEAD/trunk/core/usb_sync.c. I've very little compiler experience and ages since I done that, is there an option to include it somewhere?
For usb wired trigger, I still can't fathom your A1200 (red) normal sync test results of Dec 2013.
A theory for normal sync:
- Assuming a normal standard period of 32ms
- Assuming exposure (nearly always to the same ms) starts at the end of the current standard period if usb switch release is prior to the "criitcal value"
- Assuming exposure (nearly always to the same ms) starts at the end of the subsequent standard period if usb switch release is after the "critical value"
(these 2nd two assumptions based in nearly total 1ms precision sync test result here
https://chdk.setepontos.com/index.php?topic=13363.msg136349#msg136349 and that non precision sync shooting is very nearly as far advanced, when waiting on release, as that with precision sync)
Then, to ever record 62ms delay (between usb release and exposure start) the critical value count must be incredibly early and equate to around 2 ms.
In other words - the current count must be after 2ms (i.e. after the critical count) but prior to 3ms in which case:
time from switch release until end of current period = 32 - 2 = 30
time from end of current period to end of following standard period = 32ms
i.e. Total time from switch release = 30 + 32 = 62ms.
However, we should then also expect some current counts, at switch release, very close to the end of the standard period and therefore delay between switch release and exposure (at end of subsequent standard period) of just over 1x standard period i.e. 32ms ... but we don't see that (although your sample is small).
But it seems, to me, rather incredible that the critical value could be so early in the count & therefore that my theory could be based in reality is unlikely.
Do you have a theory to explain the observed results or know the A1200 critical value?
Edit:
the sync test diagram referred to above was here
https://chdk.setepontos.com/index.php?topic=8312.msg107601#msg107601 but I can't currently view that.