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s3is memory-mapped I/O

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s3is memory-mapped I/O
« on: 01 / February / 2008, 05:15:34 »
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Unlike the 'A' series, on the s3is it is not obvious where the memory-mapped hardware register that the USB V+ is connected to is located.

If you use software functions to detect USB change-of-state, there can be an enormous  40 to 72 msec delay before the change is detected !

Function '_kbd_read_keys_r2' seems to look at locations 0xC000001C and C0000024.

Has anyone studied this ?

How can I monitor the USB connection directly at the hardware register ?


David

Re: s3is memory-mapped I/O
« Reply #1 on: 01 / February / 2008, 08:38:12 »
On this page http://forum.ixbt.com/post.cgi?id=print:20:11661&page=45 GrAnd and VitalyB seem to discuss keyboard functions and MMIO locations for s2is/s3is.

I cannot understand the Google translation.

Could GrAnd and VitalyB please explain that page and especially what these functions do ? :-

kbd_p1_f
kbd_p1_f_cont
kbd_p2_f
kbd_read_keys_r2
platformsub_kbd_fetch_data


How do I find the location of the MMIO for s2is and s3is ?


David

Re: s3is memory-mapped I/O
« Reply #2 on: 01 / February / 2008, 08:39:54 »
and what does 'Physw_testgpio'     do ?




David

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Offline GrAnd

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Re: s3is memory-mapped I/O
« Reply #3 on: 01 / February / 2008, 11:17:56 »
On this page http://forum.ixbt.com/post.cgi?id=print:20:11661&page=45 GrAnd and VitalyB seem to discuss keyboard functions and MMIO locations for s2is/s3is.

The discussion was between VitalyB and Altsoph, not me. I do know almost nothing about MMIO because I never did any modifications it that part of code.

Of course I can try to translate that messages for you, but not append any comment.
CHDK Developer.


Re: s3is memory-mapped I/O
« Reply #4 on: 01 / February / 2008, 14:23:13 »
Of course I can try to translate that messages for you, but not append any comment.


When you have time, I would appreciate it if you could.

The person who must know is VitalyB, he wrote the original code and found the MMIO for 'A' series cameras.



David

 

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