testing sync among more cameras - page 7 - General Discussion and Assistance - CHDK Forum

testing sync among more cameras

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Offline vnd

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Re: testing sync among more cameras
« Reply #60 on: 04 / November / 2012, 13:20:07 »
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Let us see if I understand this.
In non-movie mode, the standard period is 0x110.
(in Movie mode it is 0x16B).


I have just noticed that in live view under low light conditions the camera sets longer period. So setting the fixed time to 3 * std period might give different results on both cameras. That needs to be fixed.

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What value are you reading from 0x0040600C ?

0x1215 in live view
0x10d9 in movie mode
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At the instant the switch is released we know how far we are from the end of the standard period.
Taking that into account, we calculate a synch period that ends a fixed time after switch release.
It makes no difference that the two cameras are at different points in the standard period.
If we are within ten counts of the end of the standard period, the new settings will not take effect until after  the next period so the synch period is reduced by one standard period.

The synch period is therefore either less than three standard periods or less than two standard periods.
By delaying 40 msec we ensure we are in the lower half of either synch period.
Yes, correct.
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At that point, the shot is taken immediately.
Not exactly. At this point the synch function exits, but the camera firmware still waits with the shot for the end of the period.

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any other detail ?

I have found that the value 0xe0 which is the phase which causes that the camera waits for the next period instead of shooting immediately is written to register 0xC0F0713C. See the section HEAD Timers here http://magiclantern.wikia.com/wiki/Register_Map. It is also increased in low light live view.

The higher 16 bits of 0xC0F07008 alternates between 0 and 1. That seems to just indicate odd/even period.


Re: testing sync among more cameras
« Reply #61 on: 04 / November / 2012, 13:58:55 »

0x1215 in live view
0x10d9 in movie mode

So, how do they relate to the formula for fps ?

You would think changing Movie mode LiveView produces a permanent change in movie fps.

I wonder if that will crash when shooting a movie if sound is not (somehow) disabled ?

A/V output surely has a separate timer and I don't know if it is in-synch with movie frame capture.

My friend with the S95 100H will have the synch test results first thing in the morning.
« Last Edit: 04 / November / 2012, 20:48:44 by Microfunguy »

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Offline vnd

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Re: testing sync among more cameras
« Reply #62 on: 05 / November / 2012, 04:45:10 »

0x1215 in live view
0x10d9 in movie mode

So, how do they relate to the formula for fps ?

I don't understand what you mean.

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You would think changing Movie mode LiveView produces a permanent change in movie fps.

I wonder if that will crash when shooting a movie if sound is not (somehow) disabled ?
I don't want to change fps permanently. I would insert one longer period in Movie mode LiveView to get the cameras synced, then start recording with normal parameters, so there should not be any problems with sound etc.


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A/V output surely has a separate timer and I don't know if it is in-synch with movie frame capture.

Do you think that it is necessary to actively maintain the synchronization during recording? I would thing that the cameras synced at the beginning would stay synced for time long enough.

Re: testing sync among more cameras
« Reply #63 on: 05 / November / 2012, 07:02:26 »
I don't understand what you mean.

In the example calculation of fps that funnel gave, regA x RegB = 60,000,000.

In our example, 0x110 x 0x1215 = 1,259,088 decimal.

Not a very 'nice' number.

On 100H, does the code associated with Fldspec.c contain a reference to RAM address 0xA83C and does that contain a pointer to 0xFFC3BEAC ?
« Last Edit: 05 / November / 2012, 08:08:44 by Microfunguy »

Re: testing sync among more cameras
« Reply #64 on: 06 / November / 2012, 19:00:39 »
attached you can find a Excel spreadsheet showing the synchronisation of two S95 (1.00h) using the CHDK version published in this tread. The synch values are excellent  - none of the missynch is more than 1/2222s and the median missynch is only 1/12600 s - I have never seen a better synch before (even not with SDM)

(used synchtester and a CRT monitor running at 150Hz 1024*768)

greetings
Werner

Re: testing sync among more cameras
« Reply #65 on: 06 / November / 2012, 19:55:21 »
the median missynch is only 1/12600 s

That is exceptional.
'vnd' has done very good work.


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Offline vnd

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Re: testing sync among more cameras
« Reply #66 on: 08 / November / 2012, 04:33:57 »
That 's better than I expected. :)
Thanks for testing!

Now we should find out if it works with other cameras. Any volunteer for testing?

Re: testing sync among more cameras
« Reply #67 on: 08 / November / 2012, 07:32:45 »
The SX230HS will be tested, but not immediately.

There is someone who can test the S100 but they are not, as usual, being very responsive.
However, the S100 is a DIGIC V processor.

Please remember to answer my last question.

I will start a new thread about CHDK task-context switching, please keep a lookout for it.


David
« Last Edit: 08 / November / 2012, 07:53:13 by Microfunguy »

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Online philmoz

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Re: testing sync among more cameras
« Reply #68 on: 09 / November / 2012, 03:12:39 »

Now we should find out if it works with other cameras. Any volunteer for testing?


In your period_synch.patch file how did you find the address 0x00406014 in the line:
      int std_period = *(volatile int*)(0x00406014); // value set by camera

When I examine this memory location on the G1X it is always 0xFFFFFFFF.

Phil.
CHDK ports:
  sx30is (1.00c, 1.00h, 1.00l, 1.00n & 1.00p)
  g12 (1.00c, 1.00e, 1.00f & 1.00g)
  sx130is (1.01d & 1.01f)
  ixus310hs (1.00a & 1.01a)
  sx40hs (1.00d, 1.00g & 1.00i)
  g1x (1.00e, 1.00f & 1.00g)
  g5x (1.00c, 1.01a, 1.01b)
  g7x2 (1.01a, 1.01b, 1.10b)

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Offline srsa_4c

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Re: testing sync among more cameras
« Reply #69 on: 09 / November / 2012, 06:46:02 »
In your period_synch.patch file how did you find the address 0x00406014
You can find the RAM base address by looking inside the EngDrvOut function (it's exposed as an event procedure).

 

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